On 16.04.2024 8:20 PM, Ajit Pandey wrote:
> Add device node for camera, display and graphics clock controller on
> Qualcomm SM4450 platform.
>
> Signed-off-by: Ajit Pandey <quic_ajipan@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm4450.dtsi | 35 ++++++++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
> index 603c962661cc..c78b793f5d6a 100644
> --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi
> @@ -364,6 +364,41 @@ gcc: clock-controller@100000 {
> <0>;
> };
>
> + camcc: clock-controller@ade0000 {
> + compatible = "qcom,sm4450-camcc";
> + reg = <0x0 0xade0000 0x0 0x20000>;
Please keep the non-zero address part padded to 8 hex digits
> + clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <&gcc GCC_CAMERA_AHB_CLK>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
> + dispcc: clock-controller@af00000 {
> + compatible = "qcom,sm4450-dispcc";
> + reg = <0 0x0af00000 0 0x20000>;
You used 0x0 above and 0 here.. Consistency is key! :P
Konrad
