On Tue, Jun 04, 2024 at 06:20:24PM +0300, Abel Vesa wrote:
> The actual size of the DBI region is 0xf20 and the start of the
> ELBI region is 0xf40, according to the documentation. So fix them.
> While at it, add the MHI region as well.
>
> Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes")
> Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
- Mani
> ---
> Changes in v2:
> - Dropped the 4-lane mode switch patch entire.
> - Fetched Konrad's R-b tag
> - Link to v1: https://lore.kernel.org/r/20240531-x1e80100-dts-fixes-pcie6a-v1-0-1573ebcae1e8@xxxxxxxxxx
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index cf8d8d5b1870..fe7ca2a73f9d 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -2818,15 +2818,17 @@ pcie6a: pci@1bf8000 {
> device_type = "pci";
> compatible = "qcom,pcie-x1e80100";
> reg = <0 0x01bf8000 0 0x3000>,
> - <0 0x70000000 0 0xf1d>,
> - <0 0x70000f20 0 0xa8>,
> + <0 0x70000000 0 0xf20>,
> + <0 0x70000f40 0 0xa8>,
> <0 0x70001000 0 0x1000>,
> - <0 0x70100000 0 0x100000>;
> + <0 0x70100000 0 0x100000>,
> + <0 0x01bfb000 0 0x1000>;
> reg-names = "parf",
> "dbi",
> "elbi",
> "atu",
> - "config";
> + "config",
> + "mhi";
> #address-cells = <3>;
> #size-cells = <2>;
> ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,
>
> ---
> base-commit: d97496ca23a2d4ee80b7302849404859d9058bcd
> change-id: 20240531-x1e80100-dts-fixes-pcie6a-0cf5b75a818e
>
> Best regards,
> --
> Abel Vesa <abel.vesa@xxxxxxxxxx>
>
>
--
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