On Thu, 16 May 2024 08:54:32 +0530, devi priya wrote: > This series adds support for a single-lane and two-lane PCIe PHYs > found on Qualcomm IPQ9574 platform. > > [V4] > Picked up the R-b/A-b tags. > Split the phy driver and headers to individual patches. > [V3] > https://lore.kernel.org/linux-arm-msm/20240512082541.1805335-1-quic_devipriy@xxxxxxxxxxx/ > [V2] > https://lore.kernel.org/linux-arm-msm/20230519085723.15601-1-quic_devipriy@xxxxxxxxxxx/ > [V1] > https://lore.kernel.org/linux-arm-msm/20230421124150.21190-1-quic_devipriy@xxxxxxxxxxx/ > > [...] Applied, thanks! [1/4] dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the IPQ9574 QMP PCIe PHYs commit: 29f09daab910c797f5468afda91a51e3e29de7ee [2/4] phy: qcom-qmp: Add missing offsets for Qserdes PLL registers. commit: f1aaa788b997ba8a7810da0696e89fd3f79ecce3 [3/4] phy: qcom-qmp: Add missing register definitions for PCS V5 commit: 71ae2acf1d7542ecd21c6933cae8fe65d550074b [4/4] phy: qcom-qmp-pcie: Add support for IPQ9574 g3x1 and g3x2 PCIEs commit: 2f2f5c13cc5ea87f1dd2debfd06fe5f624e5c0fd Best regards, -- Vinod Koul <vkoul@xxxxxxxxxx>
