On 30.05.2024 6:48 PM, Abel Vesa wrote: > Since the pipe clocks are fed by the QMP PHYs, they are not under the > GCC control, therefore the halt bit might not get. This will lead to > the clock driver reporting the clock as stuck, but that is inaccurate. > So instead of waiting for the halt bit to get set, just use the > HALT_DELAY flag. I can see this being a good fix, however the commit message could use some massaging. The issue you're facing is that you can't toggle these branch clocks before the QMPPHY has been fully initialized (as that initialization sequence contains, among other things, setting up the internal PLL). We're doing the HALT_SKIP thing to hack away the complexity of coming back to this. In a perfect world, we'd "defer" the toggle requests and all code that makes these, but it sounds overly complex for what it is. So in essence, the clock could really be stuck. And FWIW, you missed gcc_usb3_mp_phy_pipe_[01]_clk, and these are orphans which could use some fixing up as well. Konrad
