data is valid for only half the active window if widebus is enabled Signed-off-by: Jun Nie <jun.nie@xxxxxxxxxx> Tested-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> # on SM8550-QRD Tested-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> # on SM8650-QRD Tested-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> # on SM8650-HDK Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> Reviewed-by: Jessica Zhang <quic_jesszhan@xxxxxxxxxxx> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c index 225c1c7768ff..f97221423249 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c @@ -168,6 +168,15 @@ static void dpu_hw_intf_setup_timing_engine(struct dpu_hw_intf *intf, data_width = p->width; + /* + * If widebus is enabled, data is valid for only half the active window + * since the data rate is doubled in this mode. But for the compression + * mode in DP case, the p->width is already adjusted in + * drm_mode_to_intf_timing_params() + */ + if (p->wide_bus_en && !dp_intf) + data_width = p->width >> 1; + hsync_data_start_x = hsync_start_x; hsync_data_end_x = hsync_start_x + data_width - 1; -- 2.34.1
