Add schema for the Global Clock Controller (GCC) present on the Qualcomm MDM9615 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> --- .../bindings/clock/qcom,gcc-mdm9615.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml new file mode 100644 index 000000000000..418dea31eb62 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9615.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller + +maintainers: + - Stephen Boyd <sboyd@xxxxxxxxxx> + - Taniya Das <quic_tdas@xxxxxxxxxxx> + +description: | + Qualcomm global clock control module provides the clocks, resets and power + domains. + + See also:: + include/dt-bindings/clock/qcom,gcc-mdm9615.h + +allOf: + - $ref: qcom,gcc.yaml# + +properties: + compatible: + enum: + - qcom,gcc-mdm9615 + + clocks: + items: + - description: CXO clock + - description: PLL4 from LLC + + '#power-domain-cells': false + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + clock-controller@900000 { + compatible = "qcom,gcc-mdm9615"; + reg = <0x900000 0x4000>; + #clock-cells = <1>; + #reset-cells = <1>; + clocks = <&cxo_board>, + <&lcc_pll4>; + }; +... -- 2.39.2
