This series updates PHY and add EP PCIe node in dtsi file for ep pcie1 controller that supports gen4 and x4 lane width. Dependency for Patch 2 ---------------------- Depends on: https://lore.kernel.org/all/1714492540-15419-1-git-send-email-quic_msarkar@xxxxxxxxxxx/ V1 -> V2: - Added Reviewed-by tag in patch 1 - Fixed indentation in patch 2 - Fixed merged conflict on patch 2 and rebased on top of v6.9-rc6 - link to v1: https://lore.kernel.org/all/1699362294-15558-1-git-send-email-quic_msarkar@xxxxxxxxxxx/ Mrinmay Sarkar (2): phy: qcom-qmp-pcie: add x4 lane EP support for sa8775p arm64: dts: qcom: sa8775p: Add ep pcie1 controller node arch/arm64/boot/dts/qcom/sa8775p.dtsi | 47 ++++++++++++++++++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 9 +++++- 2 files changed, 55 insertions(+), 1 deletion(-) -- 2.7.4
