Add 16GT/s specific equalization and rx lane margining settings. These settings are inline with respective PHY settings for 16GT/s operation. In addition, current QCOM EP and RC drivers do not share common codebase which would result in code duplication. Hence, adding common files for code reusability among RC and EP drivers. v2 -> v3: - Replaced FIELD_GET/FIELD_PREP macros for bit operations. - Renamed cmn to common. - Avoided unnecessary argument validations. - Addressed review comments from Konrad and Mani. v1 -> v2: - Capitilized commit message to be inline with history - Dropped stubs from header file. - Moved Designware specific register offsets and masks to pcie-designware.h header file. - Applied settings based on bus data rate rather than link generation. - Addressed review comments from Bjorn and Frank. Shashank Babu Chinta Venkata (3): PCI: qcom: Refactor common code PCI: qcom: Add equalization settings for 16GT/s PCI: qcom: Add rx margining settings for 16GT/s drivers/pci/controller/dwc/Kconfig | 5 + drivers/pci/controller/dwc/Makefile | 1 + drivers/pci/controller/dwc/pcie-designware.h | 30 ++++ drivers/pci/controller/dwc/pcie-qcom-common.c | 129 ++++++++++++++++++ drivers/pci/controller/dwc/pcie-qcom-common.h | 14 ++ drivers/pci/controller/dwc/pcie-qcom-ep.c | 44 ++---- drivers/pci/controller/dwc/pcie-qcom.c | 72 ++-------- 7 files changed, 201 insertions(+), 94 deletions(-) create mode 100644 drivers/pci/controller/dwc/pcie-qcom-common.c create mode 100644 drivers/pci/controller/dwc/pcie-qcom-common.h -- 2.43.2
