Use the icc-clk framework to enable few clocks to be able to create paths and use the peripherals connected on those NoCs. Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx> --- v8: Bind clock and interconnect using master and slave ids Use indices instead of clock pointers v7: Auto select INTERCONNECT & INTERCONNECT_CLK in COMMON_CLK_QCOM to address build break with random config build test, with the following combination CONFIG_COMMON_CLK_QCOM=y and CONFIG_INTERCONNECT_CLK=m the following error is seen as devm_icc_clk_register is in a module and being referenced from vmlinux. powerpc64-linux-ld: drivers/clk/qcom/common.o: in function `qcom_cc_really_probe': >> common.c:(.text+0x980): undefined reference to `devm_icc_clk_register' v6: Move enum to dt-bindings and share between here and DT first_id -> icc_first_node_id v5: Split from common.c changes into separate patch No functional changes --- drivers/clk/qcom/Kconfig | 2 ++ drivers/clk/qcom/gcc-ipq9574.c | 31 +++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 8ab08e7b5b6c..b65a373f2e6b 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -17,6 +17,8 @@ menuconfig COMMON_CLK_QCOM select RATIONAL select REGMAP_MMIO select RESET_CONTROLLER + select INTERCONNECT + select INTERCONNECT_CLK if COMMON_CLK_QCOM diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c index 0a3f846695b8..7983e9ba0f35 100644 --- a/drivers/clk/qcom/gcc-ipq9574.c +++ b/drivers/clk/qcom/gcc-ipq9574.c @@ -4,6 +4,7 @@ */ #include <linux/clk-provider.h> +#include <linux/interconnect-clk.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of.h> @@ -12,6 +13,7 @@ #include <dt-bindings/clock/qcom,ipq9574-gcc.h> #include <dt-bindings/reset/qcom,ipq9574-gcc.h> +#include <dt-bindings/interconnect/qcom,ipq9574.h> #include "clk-alpha-pll.h" #include "clk-branch.h" @@ -4301,6 +4303,32 @@ static const struct qcom_reset_map gcc_ipq9574_resets[] = { [GCC_WCSS_Q6_TBU_BCR] = { 0x12054, 0 }, }; +#define IPQ_APPS_ID 9574 /* some unique value */ + +static struct qcom_icc_hws_data icc_ipq9574_hws[] = { + HWS_DATA(ANOC_PCIE0, GCC_ANOC_PCIE0_1LANE_M_CLK), + HWS_DATA(SNOC_PCIE0, GCC_SNOC_PCIE0_1LANE_S_CLK), + HWS_DATA(ANOC_PCIE1, GCC_ANOC_PCIE1_1LANE_M_CLK), + HWS_DATA(SNOC_PCIE1, GCC_SNOC_PCIE1_1LANE_S_CLK), + HWS_DATA(ANOC_PCIE2, GCC_ANOC_PCIE2_2LANE_M_CLK), + HWS_DATA(SNOC_PCIE2, GCC_SNOC_PCIE2_2LANE_S_CLK), + HWS_DATA(ANOC_PCIE3, GCC_ANOC_PCIE3_2LANE_M_CLK), + HWS_DATA(SNOC_PCIE3, GCC_SNOC_PCIE3_2LANE_S_CLK), + HWS_DATA(USB, GCC_SNOC_USB_CLK), + HWS_DATA(USB_AXI, GCC_ANOC_USB_AXI_CLK), + HWS_DATA(NSSNOC_NSSCC, GCC_NSSNOC_NSSCC_CLK), + HWS_DATA(NSSNOC_SNOC_0, GCC_NSSNOC_SNOC_CLK), + HWS_DATA(NSSNOC_SNOC_1, GCC_NSSNOC_SNOC_1_CLK), + HWS_DATA(NSSNOC_PCNOC_1, GCC_NSSNOC_PCNOC_1_CLK), + HWS_DATA(NSSNOC_QOSGEN_REF, GCC_NSSNOC_QOSGEN_REF_CLK), + HWS_DATA(NSSNOC_TIMEOUT_REF, GCC_NSSNOC_TIMEOUT_REF_CLK), + HWS_DATA(NSSNOC_XO_DCD, GCC_NSSNOC_XO_DCD_CLK), + HWS_DATA(NSSNOC_ATB, GCC_NSSNOC_ATB_CLK), + HWS_DATA(MEM_NOC_NSSNOC, GCC_MEM_NOC_NSSNOC_CLK), + HWS_DATA(NSSNOC_MEMNOC, GCC_NSSNOC_MEMNOC_CLK), + HWS_DATA(NSSNOC_MEM_NOC_1, GCC_NSSNOC_MEM_NOC_1_CLK), +}; + static const struct of_device_id gcc_ipq9574_match_table[] = { { .compatible = "qcom,ipq9574-gcc" }, { } @@ -4323,6 +4351,9 @@ static const struct qcom_cc_desc gcc_ipq9574_desc = { .num_resets = ARRAY_SIZE(gcc_ipq9574_resets), .clk_hws = gcc_ipq9574_hws, .num_clk_hws = ARRAY_SIZE(gcc_ipq9574_hws), + .icc_hws = icc_ipq9574_hws, + .num_icc_hws = ARRAY_SIZE(icc_ipq9574_hws), + .icc_first_node_id = IPQ_APPS_ID, }; static int gcc_ipq9574_probe(struct platform_device *pdev) -- 2.34.1