On Thu, Mar 28, 2024 at 02:51:09PM -0700, Stephen Boyd wrote:
> Quoting Varadarajan Narayanan (2024-03-28 00:59:35)
> > diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c
> > index 0a3f846695b8..187fd9dcdf49 100644
> > --- a/drivers/clk/qcom/gcc-ipq9574.c
> > +++ b/drivers/clk/qcom/gcc-ipq9574.c
> > @@ -4301,6 +4302,56 @@ static const struct qcom_reset_map gcc_ipq9574_resets[] = {
> > [GCC_WCSS_Q6_TBU_BCR] = { 0x12054, 0 },
> > };
> >
> > +#define IPQ_APPS_ID 9574 /* some unique value */
>
> How is this supposed to stay unique?
The icc-clk driver expects some number that wouldn't interfere
with the existing nodes. So just used the SoC id itself.
> I don't understand icc_node_create() API quite honestly. Why
> can't icc_clk_register() maintain some ida of allocated
> numbers? Or is there some global number space that we can
> "reserve" from? I'm quite amazed this is how things are
> connected in interconnect framework.
>
> > +
> > +enum {
> > + ICC_ANOC_PCIE0,
> > + ICC_SNOC_PCIE0,
> > + ICC_ANOC_PCIE1,
> > + ICC_SNOC_PCIE1,
> > + ICC_ANOC_PCIE2,
> > + ICC_SNOC_PCIE2,
> > + ICC_ANOC_PCIE3,
> > + ICC_SNOC_PCIE3,
> > + ICC_SNOC_USB,
> > + ICC_ANOC_USB_AXI,
> > + ICC_NSSNOC_NSSCC,
> > + ICC_NSSNOC_SNOC_0,
> > + ICC_NSSNOC_SNOC_1,
> > + ICC_NSSNOC_PCNOC_1,
> > + ICC_NSSNOC_QOSGEN_REF,
> > + ICC_NSSNOC_TIMEOUT_REF,
> > + ICC_NSSNOC_XO_DCD,
> > + ICC_NSSNOC_ATB,
> > + ICC_MEM_NOC_NSSNOC,
> > + ICC_NSSNOC_MEMNOC,
> > + ICC_NSSNOC_MEM_NOC_1,
> > +};
>
> Are these supposed to be in a dt-binding header?
Since these don't directly relate to the ids in the dt-bindings
not sure if they will be permitted there. Will move and post a
new version and get feedback.
Thanks
Varada
> > +
> > +static struct clk_hw *icc_ipq9574_hws[] = {
> > + [ICC_ANOC_PCIE0] = &gcc_anoc_pcie0_1lane_m_clk.clkr.hw,
> > + [ICC_SNOC_PCIE0] = &gcc_anoc_pcie1_1lane_m_clk.clkr.hw,
> > + [ICC_ANOC_PCIE1] = &gcc_anoc_pcie2_2lane_m_clk.clkr.hw,
> > + [ICC_SNOC_PCIE1] = &gcc_anoc_pcie3_2lane_m_clk.clkr.hw,
> > + [ICC_ANOC_PCIE2] = &gcc_snoc_pcie0_1lane_s_clk.clkr.hw,
> > + [ICC_SNOC_PCIE2] = &gcc_snoc_pcie1_1lane_s_clk.clkr.hw,
