On Thu, Mar 28, 2024 at 03:20:40PM +0530, Sibi Sankar wrote: > Add devicetree binding for CPUSS Control Processor (CPUCP) mailbox > controller. > > Signed-off-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx> > --- > > rfc: rfc is not a version, but a "state of the patch" tag. This should be v2. > * Use x1e80100 as the fallback for future SoCs using the cpucp-mbox > controller. [Krzysztoff/Konrad/Rob] > > .../bindings/mailbox/qcom,cpucp-mbox.yaml | 49 +++++++++++++++++++ > 1 file changed, 49 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
