The SA8540P platform is closely related to SC8280XP but differs in that
it uses an external supply for the GX power domain.
Use the new SA8540P compatible to determine whether to look up the
external supply.
This specifically avoids warnings such as:
gpu_cc-sc8280xp 3d90000.clock-controller: supply vdd-gfx not found, using dummy regulator
on SC8280XP.
Note that this also avoids triggering a potential deadlock on SC8280XP
even if the underlying issue still remains for the derivative platforms
like SA8540P and SA8295P that actually use the supply.
Fixes: deebc79b28d6 ("clk: qcom: gpucc-sc8280xp: Add external supply for GX gdsc")
Link: https://lore.kernel.org/lkml/Zf25Sv2x9WaCFuIH@xxxxxxxxxxxxxxxxxxxx/
Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
---
drivers/clk/qcom/gpucc-sc8280xp.c | 40 +++++++++++++++++++++++++++----
1 file changed, 35 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/qcom/gpucc-sc8280xp.c b/drivers/clk/qcom/gpucc-sc8280xp.c
index df6b01768767..48a2e8df14f2 100644
--- a/drivers/clk/qcom/gpucc-sc8280xp.c
+++ b/drivers/clk/qcom/gpucc-sc8280xp.c
@@ -390,7 +390,7 @@ static struct gdsc cx_gdsc = {
.flags = VOTABLE | RETAIN_FF_ENABLE,
};
-static struct gdsc gx_gdsc = {
+static struct gdsc sa8540p_gx_gdsc = {
.gdscr = 0x100c,
.clamp_io_ctrl = 0x1508,
.pd = {
@@ -402,9 +402,25 @@ static struct gdsc gx_gdsc = {
.supply = "vdd-gfx",
};
+static struct gdsc sc8280xp_gx_gdsc = {
+ .gdscr = 0x100c,
+ .clamp_io_ctrl = 0x1508,
+ .pd = {
+ .name = "gx_gdsc",
+ .power_on = gdsc_gx_do_nothing_enable,
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = CLAMP_IO | RETAIN_FF_ENABLE,
+};
+
+static struct gdsc *gpu_cc_sa8540p_gdscs[] = {
+ [GPU_CC_CX_GDSC] = &cx_gdsc,
+ [GPU_CC_GX_GDSC] = &sa8540p_gx_gdsc,
+};
+
static struct gdsc *gpu_cc_sc8280xp_gdscs[] = {
[GPU_CC_CX_GDSC] = &cx_gdsc,
- [GPU_CC_GX_GDSC] = &gx_gdsc,
+ [GPU_CC_GX_GDSC] = &sc8280xp_gx_gdsc,
};
static const struct regmap_config gpu_cc_sc8280xp_regmap_config = {
@@ -415,6 +431,14 @@ static const struct regmap_config gpu_cc_sc8280xp_regmap_config = {
.fast_io = true,
};
+static const struct qcom_cc_desc gpu_cc_sa8540p_desc = {
+ .config = &gpu_cc_sc8280xp_regmap_config,
+ .clks = gpu_cc_sc8280xp_clocks,
+ .num_clks = ARRAY_SIZE(gpu_cc_sc8280xp_clocks),
+ .gdscs = gpu_cc_sa8540p_gdscs,
+ .num_gdscs = ARRAY_SIZE(gpu_cc_sa8540p_gdscs),
+};
+
static const struct qcom_cc_desc gpu_cc_sc8280xp_desc = {
.config = &gpu_cc_sc8280xp_regmap_config,
.clks = gpu_cc_sc8280xp_clocks,
@@ -425,9 +449,14 @@ static const struct qcom_cc_desc gpu_cc_sc8280xp_desc = {
static int gpu_cc_sc8280xp_probe(struct platform_device *pdev)
{
+ const struct qcom_cc_desc *desc;
struct regmap *regmap;
int ret;
+ desc = of_device_get_match_data(&pdev->dev);
+ if (!desc)
+ return -EINVAL;
+
ret = devm_pm_runtime_enable(&pdev->dev);
if (ret)
return ret;
@@ -436,7 +465,7 @@ static int gpu_cc_sc8280xp_probe(struct platform_device *pdev)
if (ret)
return ret;
- regmap = qcom_cc_map(pdev, &gpu_cc_sc8280xp_desc);
+ regmap = qcom_cc_map(pdev, desc);
if (IS_ERR(regmap)) {
pm_runtime_put(&pdev->dev);
return PTR_ERR(regmap);
@@ -449,14 +478,15 @@ static int gpu_cc_sc8280xp_probe(struct platform_device *pdev)
qcom_branch_set_clk_en(regmap, 0x1170); /* GPU_CC_CB_CLK */
qcom_branch_set_clk_en(regmap, 0x109c); /* GPU_CC_CXO_CLK */
- ret = qcom_cc_really_probe(pdev, &gpu_cc_sc8280xp_desc, regmap);
+ ret = qcom_cc_really_probe(pdev, desc, regmap);
pm_runtime_put(&pdev->dev);
return ret;
}
static const struct of_device_id gpu_cc_sc8280xp_match_table[] = {
- { .compatible = "qcom,sc8280xp-gpucc" },
+ { .compatible = "qcom,sa8540p-gpucc", &gpu_cc_sa8540p_desc },
+ { .compatible = "qcom,sc8280xp-gpucc", &gpu_cc_sc8280xp_desc },
{ }
};
MODULE_DEVICE_TABLE(of, gpu_cc_sc8280xp_match_table);
--
2.43.0
