Add master/slave ids for Qualcomm IPQ9574 Network-On-Chip interfaces. This will be used by the gcc-ipq9574 driver that will for providing interconnect services using the icc-clk framework. Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx> --- .../dt-bindings/interconnect/qcom,ipq9574.h | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 include/dt-bindings/interconnect/qcom,ipq9574.h diff --git a/include/dt-bindings/interconnect/qcom,ipq9574.h b/include/dt-bindings/interconnect/qcom,ipq9574.h new file mode 100644 index 000000000000..96f79a86e8d2 --- /dev/null +++ b/include/dt-bindings/interconnect/qcom,ipq9574.h @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +#ifndef INTERCONNECT_QCOM_IPQ9574_H +#define INTERCONNECT_QCOM_IPQ9574_H + +#define IPQ_APPS_ID 9574 /* some unique value */ +#define IPQ_NSS_ID (IPQ_APPS_ID * 2) + +#define IPQ_ANOC_PCIE0_1_MAS 0 +#define IPQ_ANOC_PCIE0_1_SLV 1 +#define IPQ_SNOC_PCIE0_1_MAS 2 +#define IPQ_SNOC_PCIE0_1_SLV 3 +#define IPQ_ANOC_PCIE1_1_MAS 4 +#define IPQ_ANOC_PCIE1_1_SLV 5 +#define IPQ_SNOC_PCIE1_1_MAS 6 +#define IPQ_SNOC_PCIE1_1_SLV 7 +#define IPQ_ANOC_PCIE2_2_MAS 8 +#define IPQ_ANOC_PCIE2_2_SLV 9 +#define IPQ_SNOC_PCIE2_2_MAS 10 +#define IPQ_SNOC_PCIE2_2_SLV 11 +#define IPQ_ANOC_PCIE3_2_MAS 12 +#define IPQ_ANOC_PCIE3_2_SLV 13 +#define IPQ_SNOC_PCIE3_2_MAS 14 +#define IPQ_SNOC_PCIE3_2_SLV 15 +#define IPQ_USB_MAS 16 +#define IPQ_USB_SLV 17 +#define IPQ_USB_AXI_MAS 18 +#define IPQ_USB_AXI_SLV 19 +#define IPQ_NSSNOC_NSSCC_MAS 20 +#define IPQ_NSSNOC_NSSCC_SLV 21 +#define IPQ_NSSNOC_SNOC_MAS 22 +#define IPQ_NSSNOC_SNOC_SLV 23 +#define IPQ_NSSNOC_SNOC_1_MAS 24 +#define IPQ_NSSNOC_SNOC_1_SLV 25 +#define IPQ_NSSNOC_PCNOC_1_MAS 26 +#define IPQ_NSSNOC_PCNOC_1_SLV 27 +#define IPQ_NSSNOC_QOSGEN_REF_MAS 28 +#define IPQ_NSSNOC_QOSGEN_REF_SLV 29 +#define IPQ_NSSNOC_TIMEOUT_REF_MAS 30 +#define IPQ_NSSNOC_TIMEOUT_REF_SLV 31 +#define IPQ_NSSNOC_XO_DCD_MAS 32 +#define IPQ_NSSNOC_XO_DCD_SLV 33 +#define IPQ_NSSNOC_ATB_MAS 34 +#define IPQ_NSSNOC_ATB_SLV 35 +#define IPQ_MEM_NOC_NSSNOC_MAS 36 +#define IPQ_MEM_NOC_NSSNOC_SLV 37 +#define IPQ_NSSNOC_MEMNOC_MAS 38 +#define IPQ_NSSNOC_MEMNOC_SLV 39 +#define IPQ_NSSNOC_MEM_NOC_1_MAS 40 +#define IPQ_NSSNOC_MEM_NOC_1_SLV 41 + +#define IPQ_NSS_CC_NSSNOC_PPE_MAS 0 +#define IPQ_NSS_CC_NSSNOC_PPE_SLV 1 +#define IPQ_NSS_CC_NSSNOC_PPE_CFG_MAS 2 +#define IPQ_NSS_CC_NSSNOC_PPE_CFG_SLV 3 +#define IPQ_NSS_CC_NSSNOC_NSS_CSR_MAS 4 +#define IPQ_NSS_CC_NSSNOC_NSS_CSR_SLV 5 +#define IPQ_NSS_CC_NSSNOC_IMEM_QSB_MAS 6 +#define IPQ_NSS_CC_NSSNOC_IMEM_QSB_SLV 7 +#define IPQ_NSS_CC_NSSNOC_IMEM_AHB_MAS 8 +#define IPQ_NSS_CC_NSSNOC_IMEM_AHB_SLV 9 + +#endif /* INTERCONNECT_QCOM_IPQ9574_H */ -- 2.34.1
