Add three missing cDSP fastrpc compute-cb nodes for the SM8650 SoC.
Signed-off-by: Ling Xu <quic_lxu5@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 29 ++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index ba72d8f38420..c238ad1be0d4 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5084,6 +5084,35 @@
<&apps_smmu 0x19c8 0x0>;
dma-coherent;
};
+
+ /* note: secure cb9 in downstream */
+
+ compute-cb@10 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <12>;
+ iommus = <&apps_smmu 0x196C 0x0000>,
+ <&apps_smmu 0x0C0C 0x0020>,
+ <&apps_smmu 0x19CC 0x0000>;
+ dma-coherent;
+ };
+
+ compute-cb@11 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <13>;
+ iommus = <&apps_smmu 0x196D 0x0000>,
+ <&apps_smmu 0x0C0D 0x0020>,
+ <&apps_smmu 0x19CD 0x0000>;
+ dma-coherent;
+ };
+
+ compute-cb@12 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <14>;
+ iommus = <&apps_smmu 0x196E 0x0000>,
+ <&apps_smmu 0x0C0E 0x0020>,
+ <&apps_smmu 0x19CE 0x0000>;
+ dma-coherent;
+ };
};
};
};
--
2.17.1
