On Fri, 23 Feb 2024 16:21:12 +0100, Johan Hovold wrote:
> This series addresses a few problems with the sc8280xp PCIe
> implementation.
>
> The DWC PCIe controller can either use its internal MSI controller or an
> external one such as the GICv3 ITS. Enabling the latter allows for
> assigning affinity to individual interrupts, but results in a large
> amount of Correctable Errors being logged on both the Lenovo ThinkPad
> X13s and the sc8280xp-crd reference design.
>
> [...]
Applied, thanks!
[06/12] arm64: dts: qcom: sc8280xp-crd: limit pcie4 link speed
commit: db8138845cebcdd0c709570b8217bd052757b8df
[07/12] arm64: dts: qcom: sc8280xp-x13s: limit pcie4 link speed
commit: 7a1c6a8bf47b0b290c79b9cc3ba6ee68be5522e8
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
