On 19.02.2024 15:53, Dmitry Baryshkov wrote:
> On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> wrote:
>>
>> Commit 134b55b7e19f ("clk: qcom: support Huayra type Alpha PLL")
>> introduced an entry to the alpha offsets array, but diving into QCM2290
>> downstream and some documentation, it turned out that the name Huayra
>> apparently has been used quite liberally across many chips, even with
>> noticeably different hardware.
>>
>> Introduce another set of offsets and a new configure function for the
>> Huayra PLL found on QCM2290. This is required e.g. for the consumers
>> of GPUCC_PLL0 to properly start.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
>> ---
>> drivers/clk/qcom/clk-alpha-pll.c | 45 ++++++++++++++++++++++++++++++++++++++++
>> drivers/clk/qcom/clk-alpha-pll.h | 3 +++
>> 2 files changed, 48 insertions(+)
>>
>> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
>> index 8a412ef47e16..61b5abd13782 100644
>> --- a/drivers/clk/qcom/clk-alpha-pll.c
>> +++ b/drivers/clk/qcom/clk-alpha-pll.c
>> @@ -244,6 +244,19 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = {
>> [PLL_OFF_OPMODE] = 0x30,
>> [PLL_OFF_STATUS] = 0x3c,
>> },
>> + [CLK_ALPHA_PLL_TYPE_HUAYRA_2290] = {
>> + [PLL_OFF_L_VAL] = 0x04,
>> + [PLL_OFF_ALPHA_VAL] = 0x08,
>> + [PLL_OFF_USER_CTL] = 0x0c,
>> + [PLL_OFF_CONFIG_CTL] = 0x10,
>> + [PLL_OFF_CONFIG_CTL_U] = 0x14,
>> + [PLL_OFF_CONFIG_CTL_U1] = 0x18,
>> + [PLL_OFF_TEST_CTL] = 0x1c,
>> + [PLL_OFF_TEST_CTL_U] = 0x20,
>> + [PLL_OFF_TEST_CTL_U1] = 0x24,
>> + [PLL_OFF_OPMODE] = 0x28,
>> + [PLL_OFF_STATUS] = 0x38,
>> + },
>
> Can you please move them next to the standard huayra PLL regs?
Sure, no prob
Konrad
