On Fri, Jan 08, 2016 at 03:57:09PM -0800, Stephen Boyd wrote: > The msm8916 SoC has an L2 cache for all 4 CPUs. Add it to the > dtsi file so that the cache hierarchy can be probed. > > Cc: <devicetree@xxxxxxxxxxxxxxx> > Signed-off-by: Stephen Boyd <sboyd@xxxxxxxxxxxxxx> > --- Reviewed-by: Andy Gross <andy.gross@xxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
