On 07/02/2024 15:22, Dmitry Baryshkov wrote:
On Wed, 7 Feb 2024 at 14:46, AngeloGioacchino Del Regno
<angelogioacchino.delregno@xxxxxxxxxxxxx> wrote:
Il 07/02/24 12:45, Dmitry Baryshkov ha scritto:
On Wed, 7 Feb 2024 at 11:08, Abel Vesa <abel.vesa@xxxxxxxxxx> wrote:
On 24-02-07 09:23:09, Dmitry Baryshkov wrote:
On Wed, 7 Feb 2024 at 09:19, Abel Vesa <abel.vesa@xxxxxxxxxx> wrote:
On 24-02-07 01:55:39, Dmitry Baryshkov wrote:
On Wed, 7 Feb 2024 at 01:34, Abel Vesa <abel.vesa@xxxxxxxxxx> wrote:
Some newer SPMI controllers support multiple bus masters.
Such a master can control multiple slave devices. The generic
framework needs to be able to pass on the master id to the
controller-specific driver. So do that. The framework will
check if the devicetree child nodes are actually bus masters
and will register the devices for each master. The legacy
approach will still be supported for backwards compatibility.
Please remind me, are those two actual bus musters driving a single
bus in parallel or two SPMI buses being handled by a single device? In
the latter case this implementation is incorrect. There should be
multiple spmi_controller instances, one for each bus. Allocate them in
a loop and set ctrl->dev.of_node after allocating.
It's two SPMI buses (two sets of wires) handled by the same controller,
HW-wise.
If we register two spmi controllers with the kernel framework, it will
be HW inaccurate, because there is just one controller which has
multiple masters.
struct spmi_controller is a controller for a single bus. Inside your
device you have two SPMI buses, each can be controlled by its own
struct spmi_controller. Just like devices that control multiple I2C,
SPI or USB busses register a separate instance of the bus controller.
Well, this is what this patchset is trying to do in the generic part.
The SPMI controller supports multiple buses (HW-wise) and therefore SW
implementation shouldn't be tied to single bus requirement.
So, after the off-line discussion:
- add new compatible string for sm8450+
- register two spmi controller instances
Well, I don't know about the actual hardware that you're trying to implement
but, in my opinion, the "idea" of this series does actually make sense.
The SPMI specification says that SPMI supports up to 4 masters, and up to
16 slaves.
So, that is my main question: whether this supports multiple masters
on a same bus or multiple buses. From the SoC pins description I
assume the latter is the case.
This is clearly 2 separate physically separate busses, not 2 masters on the same bus.
We registers separate controllers for i2c, spi, 1w, ... in this case, why not here ?
Neil
Just my two cents.
Cheers,
Angelo
- drop the master-id from the SPMI interface
- optionally: think about having a new separate driver for v7 SPMI.
I'm not saying it might not work. But, to me, it looks more like a hack.
Basically, we would be mapping HW bus masters to kernel controllers.
Buses, not just masters.
Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
---
drivers/spmi/spmi-mtk-pmif.c | 6 ++--
drivers/spmi/spmi-pmic-arb.c | 10 +++---
drivers/spmi/spmi.c | 76 ++++++++++++++++++++++++++++++--------------
include/linux/spmi.h | 10 +++---
4 files changed, 67 insertions(+), 35 deletions(-)
--
With best wishes
Dmitry
--
With best wishes
Dmitry
