On 2/6/2024 1:30 PM, Dmitry Baryshkov wrote:
Hi Krishna,
On Tue, 6 Feb 2024 at 07:18, Krishna Kurapati <quic_kriskura@xxxxxxxxxxx> wrote:
Currently the DWC3 driver supports only single port controller which
requires at most two PHYs ie HS and SS PHYs. There are SoCs that has
DWC3 controller with multiple ports that can operate in host mode.
Some of the port supports both SS+HS and other port supports only HS
mode.
This change primarily refactors the Phy logic in core driver to allow
multiport support with Generic Phy's.
Changes have been tested on QCOM SoC SA8295P which has 4 ports (2
are HS+SS capable and 2 are HS only capable).
Thank you for your patches! Have you tested how this patchset
interacts with the USB role-switching?
I'm asking because it might be easier to define DT nodes for each of
USB ports, which can carry the PHY properties (and also other DT
properties if that's required, e.g. the ports / endpoints and
usb-role-switch) rather than pushing all USB PHY links to the root DT
node.
Hi Dmitry,
Role switching doesn't work for Multiport controller as it is host
only capable. I don't think it will cause any issues for OTG capable
controllers because they only have one HS and SS phy present. So there
is no possibility or requirement for having endpoints per port in this case.
Regards,
Krishna,
