On Thu, Feb 01, 2024 at 04:17:32PM +0100, Christian Marangi wrote: > Document Qcom QCA807x PHY package. > > Qualcomm QCA807X Ethernet PHY is PHY package of 2 or 5 > IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and > 1000BASE-T PHY-s. > > Document the required property to make the PHY package correctly > configure and work. > > Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx> > --- > .../devicetree/bindings/net/qcom,qca807x.yaml | 142 ++++++++++++++++++ > 1 file changed, 142 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/qcom,qca807x.yaml > > diff --git a/Documentation/devicetree/bindings/net/qcom,qca807x.yaml b/Documentation/devicetree/bindings/net/qcom,qca807x.yaml > new file mode 100644 > index 000000000000..1c3692897b02 > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/qcom,qca807x.yaml > @@ -0,0 +1,142 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/qcom,qca807x.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm QCA807X Ethernet PHY > + > +maintainers: > + - Christian Marangi <ansuelsmth@xxxxxxxxx> > + - Robert Marko <robert.marko@xxxxxxxxxx> > + > +description: | > + Qualcomm QCA807X Ethernet PHY is PHY package of 2 or 5 > + IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and > + 1000BASE-T PHY-s. > + > + They feature 2 SerDes, one for PSGMII or QSGMII connection with > + MAC, while second one is SGMII for connection to MAC or fiber. > + > + Both models have a combo port that supports 1000BASE-X and > + 100BASE-FX fiber. > + > + Each PHY inside of QCA807x series has 4 digitally controlled > + output only pins that natively drive LED-s for up to 2 attached > + LEDs. Some vendor also use these 4 output for GPIO usage without > + attaching LEDs. > + > + Note that output pins can be set to drive LEDs OR GPIO, mixed > + definition are not accepted. > + > + PHY package can be configured in 3 mode following this table: > + > + First Serdes mode Second Serdes mode > + Option 1 PSGMII for copper Disabled > + ports 0-4 > + Option 2 PSGMII for copper 1000BASE-X / 100BASE-FX > + ports 0-4 > + Option 3 QSGMII for copper SGMII for > + ports 0-3 copper port 4 > + > +$ref: ethernet-phy-package.yaml# > + > +properties: > + compatible: > + const: qcom,qca807x-package > + > + qcom,package-mode: > + enum: > + - qsgmii > + - psgmii > + > + qcom,tx-driver-strength: > + description: set the TX Amplifier value in mv. > + If not defined, 600mw is set by default. > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [140, 160, 180, 200, 220, > + 240, 260, 280, 300, 320, > + 400, 500, 600] > + > +patternProperties: > + ^ethernet-phy(@[a-f0-9]+)?$: I don't get how an address is optional. Rob
