On Thu, Dec 17, 2015 at 03:18:43PM +0200, Stanimir Varbanov wrote: > Bjorn, thanks for the comments! > > On 12/16/2015 11:53 PM, Bjorn Helgaas wrote: > > On Thu, Dec 03, 2015 at 03:35:22PM +0200, Stanimir Varbanov wrote: > >> From: Stanimir Varbanov <svarbanov@xxxxxxxxxx> > >> > >> The PCIe driver reuse the Designware common code for host > >> and MSI initialization, and also program the Qualcomm > >> application specific registers. > >> > >> Signed-off-by: Stanimir Varbanov <svarbanov@xxxxxxxxxx> > >> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@xxxxxxxxxx> > >> --- > >> MAINTAINERS | 7 + > >> drivers/pci/host/Kconfig | 10 + > >> drivers/pci/host/Makefile | 1 + > >> drivers/pci/host/pcie-qcom.c | 624 ++++++++++++++++++++++++++++++++++++++++++ > > > >> +#define PCIE20_CAP 0x70 > >> +#define PCIE20_CAP_LINKCTRLSTATUS (PCIE20_CAP + 0x10) > >> +#define PCIE20_CAP_LINKCTRLSTATUS_LINK_UP BIT(29) > > > > This looks like it could be referring to a standard PCIe Capability; > > could you use the existing PCI_EXP_LNKSTA and PCI_EXP_LNKSTA_DLLLA > > symbols here? And readw() instead of readl()? > > Yes, that is possible but I still need to keep PCIE20_CAP capabilities > offset. Great, thanks! I think that will help keep generic PCIe things from looking like they're special implementation-specific things. Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
