(Generic note: It is middle of merge window and I have seen multiple
series posted by you. Since I am mainly looking for bug fixes only ATM,
I may miss to look at few. You may have to ping or repost after the merge
window, just responding to this for now as it caught my attention)
On Wed, Jan 17, 2024 at 11:04:57PM +0530, Sibi Sankar wrote:
> Enable cpufreq on X1E80100 SoCs through the SCMI perf protocol node.
>
> Signed-off-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 27 ++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index afdbd27f8346..6856a206f7fc 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -62,6 +62,7 @@ CPU0: cpu@0 {
> compatible = "qcom,oryon";
> reg = <0x0 0x0>;
> enable-method = "psci";
> + clocks = <&scmi_dvfs 0>;
I would use genpd bindings Ulf added recently. The reason I ask is I remember
one of the Qcom platform had both clocks and qcom,freq-domain and each one
served different purpose with latter one being used for cpufreq. So will
that be an issue here ?
--
Regards,
Sudeep
