On 29/12/2023 18:17, Manivannan Sadhasivam wrote:
On Fri, Dec 29, 2023 at 04:36:31PM +0100, David wrote:
+ minItems: 1
Hello Krzysztof,
the driver will accept 0 just fine, so I think this definition may be wrong.
It's not entirely wrong but the actual SID mapping differs between SoCs.
Sure, I think I can live with this.
I sent just generic "dt-bindings: PCI: qcom: delimit number of iommu-map entries" which doesn't care about the numbers (in similar fashion as other bindings having iommu-map).
No, we should not just ignore the MAX limit. If you add <N> number of entries
exceeding the max SID assigned to PCIe bus, it will fail.
- Mani
Make sense, thanks for explanation.
Reviewed-by: David Heidelberg <david@xxxxxxx>
Tell me what you think.
David
--
David Heidelberg
