Some RCG frequency can be reached by multiple configuration.
We currently declare multiple configuration for the same frequency but
that is not supported and always the first configuration will be taken.
These multiple configuration are needed as based on the current parent
configuration, it may be needed to use a different configuration to
reach the same frequency.
To handle this introduce 3 new macro, C, FM and FMS:
- C is used to declare a freq_conf where src, pre_div, m and n are
provided.
- FM is used to declare a freq_multi_tbl with the frequency and an
array of confs to insert all the config for the provided frequency.
- FMS is used to declare a freq_multi_tbl with the frequency and an
array of a single conf with the provided src, pre_div, m and n.
Struct clk_rcg2 is changed to add a union type to reference a simple
freq_tbl or a complex freq_multi_tbl.
Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
---
drivers/clk/qcom/clk-rcg.h | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
index e6d84c8c7989..c50e6616d02c 100644
--- a/drivers/clk/qcom/clk-rcg.h
+++ b/drivers/clk/qcom/clk-rcg.h
@@ -17,6 +17,23 @@ struct freq_tbl {
u16 n;
};
+#define C(s, h, m, n) { (s), (2 * (h) - 1), (m), (n) }
+#define FM(f, confs) { (f), ARRAY_SIZE(confs), (confs) }
+#define FMS(f, s, h, m, n) { (f), 1, (const struct freq_conf []){ C(s, h, m, n) } }
+
+struct freq_conf {
+ u8 src;
+ u8 pre_div;
+ u16 m;
+ u16 n;
+};
+
+struct freq_multi_tbl {
+ unsigned long freq;
+ size_t num_confs;
+ const struct freq_conf *confs;
+};
+
/**
* struct mn - M/N:D counter
* @mnctr_en_bit: bit to enable mn counter
@@ -138,6 +155,7 @@ extern const struct clk_ops clk_dyn_rcg_ops;
* @safe_src_index: safe src index value
* @parent_map: map from software's parent index to hardware's src_sel field
* @freq_tbl: frequency table
+ * @freq_multi_tbl: frequency table for clocks reachable with multiple RCGs conf
* @clkr: regmap clock handle
* @cfg_off: defines the cfg register offset from the CMD_RCGR + CFG_REG
* @parked_cfg: cached value of the CFG register for parked RCGs
@@ -149,7 +167,10 @@ struct clk_rcg2 {
u8 hid_width;
u8 safe_src_index;
const struct parent_map *parent_map;
- const struct freq_tbl *freq_tbl;
+ union {
+ const struct freq_tbl *freq_tbl;
+ const struct freq_multi_tbl *freq_multi_tbl;
+ };
struct clk_regmap clkr;
u8 cfg_off;
u32 parked_cfg;
--
2.40.1
