On Thu, Nov 26, 2015 at 12:50:08AM +0000, Måns Rullgård wrote: > If not calling the function saves an I-cache miss, the benefit can be > substantial. No, I have no proof of this being a problem, but it's > something that could happen. That's a simplistic view of modern CPUs. As I've already said, modern CPUs which have branch prediction, but they also have speculative instruction fetching and speculative data prefetching - which the CPUs which have idiv support will have. With such features, the branch predictor is able to learn that the branch will be taken, and because of the speculative instruction fetching, it can bring the cache line in so that it has the instructions it needs with minimal or, if working correctly, without stalling the CPU pipeline. -- FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up according to speedtest.net. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
