On 14.12.2023 17:49, Abel Vesa wrote:
> From: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx>
>
> Add Graphics Clock Controller (GPUCC) support for X1E80100 platform.
>
> Signed-off-by: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> ---
[...]
I see no usage of clk_branch2_aon_ops, is that intended?
[...]
> +static struct gdsc gpu_cc_cx_gdsc = {
> + .gdscr = 0x9108,
> + .gds_hw_ctrl = 0x953c,
> + .en_rest_wait_val = 0x2,
> + .en_few_wait_val = 0x2,
> + .clk_dis_wait_val = 0xf,
> + .pd = {
> + .name = "gpu_cc_cx_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
That's.. unusual..
Can you doublecheck these flags?
> +
> + /*
> + * Keep clocks always enabled:
> + * gpu_cc_cb_clk
> + */
> + regmap_update_bits(regmap, 0x93a4, BIT(0), BIT(0));
Please make the comment inline, so:
regmap_update_bits(regmap, 0x93a4, BIT(0), BIT(0)); /* GPU_CC_CB_CLK */
I have submitted another series cleaning this up and adding a helper
Konrad
