On 16.12.2023 00:30, David Heidelberg wrote: > Convert Qualcomm IOMMU v0 implementation to yaml format. > > Signed-off-by: David Heidelberg <david@xxxxxxx> > --- [...] > +description: > Not sure if > is necessary > + The MSM IOMMU is an implementation compatible with the ARM VMSA short > + descriptor page tables. It provides address translation for bus masters > + outside of the CPU, each connected to the IOMMU through a port called micro-TLB. > + > +properties: > + compatible: > + const: qcom,apq8064-iommu > + > + clocks: > + items: > + - description: interface clock for register accesses > + - description: functional clock for bus accesses > + > + clock-names: > + items: > + - const: smmu_pclk > + - const: iommu_clk > + > + reg: > + maxItems: 1 > + > + interrupts: > + description: Specifiers for the MMU fault interrupts. > + minItems: 1 > + items: > + - description: non-secure mode interrupt > + - description: secure mode interrupt (for instances which supports it) > + > + "#iommu-cells": > + const: 1 > + description: | | may not be necessary > + The first cell is a phandle to the IOMMU and > + the second cell is the stream id. Weird wrapping > + A single master device can be connected to more than one iommu > + and multiple contexts in each of the iommu. > + So multiple entries are required to list all the iommus and > + the stream ids that the master is connected to. > + > + qcom,ncb: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: The total number of context banks in the IOMMU. > + > +required: > + - clocks > + - clock-names > + - reg > + - interrupts > + - qcom,ncb > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,mmcc-msm8960.h> > + > + iommu@7500000 { > + compatible = "qcom,apq8064-iommu"; > + #iommu-cells = <1>; > + clock-names = > + "smmu_pclk", > + "iommu_clk"; > + clocks = > + <&clk SMMU_AHB_CLK>, > + <&clk MDP_AXI_CLK>; > + reg = <0x07500000 0x100000>; > + interrupts = > + <0 63 0>, > + <0 64 0>; > + qcom,ncb = <2>; 2012 codestyle :D Please update to: iommu@7500000 { compatible = "qcom,apq8064-iommu"; reg = <0x07500000 0x100000>; interrupts = <GIC_SPI 63 IRQ_TYPE_NONE>, //preferably fix this TYPE_NONE <GIC_SPI 64 IRQ_TYPE_NONE>; clocks = <&clk SMMU_AHB_CLK>, <&clk MDP_AXI_CLK>; clock-names = "smmu_pclk", "iommu_clk"; #iommu-cells = <1>; qcom,ncb = <2>; }; + Krzysztof would likely suggest to reorder the definitions and occurences in required: to match this /\ Thanks for taking care of this old junk! Konrad