Hi Bjorn,
I have said in one of the thread here,
https://lore.kernel.org/lkml/57eed7c3-e884-a28b-a1ff-e5aecbb11137@xxxxxxxxxxx/
There is a wrong register offset given for sm8550 in 4/4.
Since, you applied the changes in your tree, shall i send
the separate patch for it, or would you mind fixing it ?
-Mukesh
On 12/8/2023 8:27 AM, Bjorn Andersson wrote:
On Wed, 25 Oct 2023 22:36:38 +0530, Mukesh Ojha wrote:
Document the compatible for both sm8250 and sm8350 SoCs.
Applied, thanks!
[2/4] arm64: dts: qcom: sm8250: Add TCSR halt register space
commit: d59653233e8779e3fe082eb5635b9785f2095af6
[3/4] arm64: dts: qcom: sm8350: Add TCSR halt register space
commit: 1accc6031d925c6045c4776d5f3646996b0b242a
[4/4] arm64: dts: qcom: sm8550: Enable download mode register write
commit: 44b1f64cad5703c87918cc9ffbf9b79bb959418d
Best regards,
