On Sunday 22 November 2015 21:36:45 Nicolas Pitre wrote:
> On Sun, 22 Nov 2015, Arnd Bergmann wrote:
>
> > I've also found some /proc/cpuinfo output to cross-reference SoCs
> > to their core names.
> >
> > variant part revision name features
> > dove: 0 0x581 5 PJ4 idivt
>
> I just managed to boot my dusty Dove DB and ran a quick test programon
> it. Its cpuinfo corresponds to the above.
>
> $ cat m.c
> #include <stdio.h>
> int mydiv(int, int);
> int main()
> {
> printf("div test\n");
> printf("%d\n", mydiv(12345678, 37));
> return 0;
> }
> $ cat d.c
> int mydiv(int x, int y)
> {
> return x/y;
> }
> $ gcc -o test m.c d.c
> $ ./test
> div test
> 333666
> $ gcc -o test m.c d.c -march=armv7ve -mthumb
> $ ./test
> div test
> 333666
> $ gcc -o test m.c d.c -march=armv7ve -marm
> $ ./test
> div test
> Illegal instruction (core dumped)
> $
Ok, thanks a lot! So the reporting in /proc/cpuinfo clearly matches
the actual features, and we can just treat this as no LPAE / no IDIV
for kernel compilation, as nobody ever seems to use THUMB2_KERNEL
in practice.
PJ4-MP is like Cortex-A15/A7/A12/A17 and supports both IDIV and LPAE,
which leaves the question whether Scorpion or Krait do the same as
well, or whether they are outliers and need a special configuration.
Arnd
--
To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
