Re: [PATCH v2] drm/msm/dpu: correct clk bit for WB2 block

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On 12/5/2023 12:30 PM, Abhinav Kumar wrote:

On 12/2/2023 4:24 PM, Dmitry Baryshkov wrote:
On sc7280 there are two clk bits for WB2: vbif_cli and clk_ctrl. While
programming the VBIF params of WB, the driver should be toggling the
former bit, while the sc7180_mdp, sc7280_mdp and sm8250_mdp structs
list the latter one.

Correct that to ensure proper programming sequence for WB2 on these

Fixes: 255f056181ac ("drm/msm/dpu: sc7180: add missing WB2 clock control")
Fixes: 3ce166380567 ("drm/msm/dpu: add writeback support for sc7280")
Fixes: 53324b99bd7b ("drm/msm/dpu: add writeback blocks to the sm8250 DPU catalog")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>

Changes since v1:
  - Fixed the bits for all three platforms supporting WB (Abhinav)

  drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 2 +-
  drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 2 +-
  drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +-
  3 files changed, 3 insertions(+), 3 deletions(-)

LGTM now.

Reviewed-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
Tested-by: Paloma Arellano <quic_parellan@xxxxxxxxxxx>

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