On 11/27/2023 9:05 PM, Konrad Dybcio wrote:
On 27.11.2023 15:54, Bibek Kumar Patro wrote:Add ACTLR data table for SC7280 along with support for same including SC7280 specific implementation operations. Signed-off-by: Bibek Kumar Patro <quic_bibekkum@xxxxxxxxxxx> --- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 25 +++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 247eaa194129..f0ad09f9a974 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -27,6 +27,20 @@ struct actlr_config { #define CPRE BIT(1) /* Enable context caching in the prefetch buffer */ #define CMTLB BIT(0) /* Enable context caching in the macro TLB */ +static const struct actlr_config sc7280_apps_actlr_cfg[] = { + { 0x0800, 0x24E1, PREFETCH_DISABLE | CMTLB },hex should be lowercase
Noted,thanks for pointing this out will take care of this in next version.
Yes it's complete only. This list varies targetwise actually so we just fill it referring the hardware settings reference document. So size of the list might vary as per target.+ { 0x2000, 0x0163, PREFETCH_DISABLE | CMTLB }, + { 0x2080, 0x0461, PREFETCH_DISABLE | CMTLB }, + { 0x2100, 0x0161, PREFETCH_DISABLE | CMTLB }, + { 0x0900, 0x0407, PREFETCH_SHALLOW | CPRE | CMTLB }, + { 0x2180, 0x0027, PREFETCH_SHALLOW | CPRE | CMTLB }, + { 0x1000, 0x07ff, PREFETCH_DEEP | CPRE | CMTLB }, +};Any reason this list is so much smaller than 8550's? Is it complete?
Konrad
Thanks & regards, Bibek
