Re: [PATCH v3 3/3] arm64: dts: qcom: sa8775p: Mark PCIe controller as cache coherent

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On 11/17/2023 2:36 PM, Manivannan Sadhasivam wrote:
On Wed, Nov 15, 2023 at 06:07:01PM +0530, Mrinmay Sarkar wrote:
The PCIe controller on SA8775P supports cache coherency, hence add the
"PCIe RC controller" both in subject and description.

This is for EP so will make as "PCIe EP controller"

--Mrinmay

"dma-coherent" property to mark it as such.

Signed-off-by: Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx>
With that,

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>

- Mani

---
  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1 +
  1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 7eab458..ab01efe 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -3620,6 +3620,7 @@
  				<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>;
  		interconnect-names = "pcie-mem", "cpu-pcie";
+ dma-coherent;
  		iommus = <&pcie_smmu 0x0000 0x7f>;
  		resets = <&gcc GCC_PCIE_0_BCR>;
  		reset-names = "core";
--
2.7.4





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