On Mon, 6 Nov 2023 at 13:53, Krishna chaitanya chundru <quic_krichai@xxxxxxxxxxx> wrote: > > This series adds support to provide refclk to endpoint even in low > power states. > > Due to some platform specific issues with CLKREQ signal, it is not being > propagated to the host and as host doesn't know the clkreq signal host is > not sending refclk. Due to this endpoint is seeing linkdown and going > to bad state. Is this a board issue or an SoC issue? In the latter case this should go to the PHY configuration structure instead of being specified in the DT. > To avoid those ref clk should be provided always to the endpoint. The > issue is coming only when ep intiates the L1.1 or L1.2 exit and clkreq > is not being propagated properly to the host. > > Signed-off-by: Krishna chaitanya chundru <quic_krichai@xxxxxxxxxxx> > --- > Krishna chaitanya chundru (2): > dt-bindings: phy: qcom,qmp: Add PCIe qcom,refclk-always-on property > phy: qcom-qmp-pcie: Add support for keeping refclk always on > > .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 5 +++++ > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 21 +++++++++++++++++---- > 2 files changed, 22 insertions(+), 4 deletions(-) > --- > base-commit: 71e68e182e382e951d6248bccc3c960dcec5a718 > change-id: 20231106-refclk_always_on-9beae8297cb8 > > Best regards, > -- > Krishna chaitanya chundru <quic_krichai@xxxxxxxxxxx> > -- With best wishes Dmitry
