On Wed, Oct 25, 2023 at 10:53:21AM +0800, Tao Zhang wrote:
> Add property "qcom,cmb-elem-size" to support CMB(Continuous
> Multi-Bit) element for TPDM. The associated aggregator will read
> this size before it is enabled. CMB element size currently only
> supports 32-bit and 64-bit.
>
> Signed-off-by: Tao Zhang <quic_taozha@xxxxxxxxxxx>
> Signed-off-by: Mao Jinlong <quic_jinlmao@xxxxxxxxxxx>
> ---
> .../bindings/arm/qcom,coresight-tpdm.yaml | 27 ++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
> index 61ddc3b..f9a2025 100644
> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
> @@ -52,6 +52,14 @@ properties:
> $ref: /schemas/types.yaml#/definitions/uint8
> enum: [32, 64]
>
> + qcom,cmb-element-size:
What are the units? Use '-bits' suffix.
> + description:
> + Specifies the CMB(Continuous Multi-Bit) element size supported by
> + the monitor. The associated aggregator will read this size before it
> + is enabled. CMB element size currently only supports 32-bit and 64-bit.
The enum says 8-bit is supported.
> + $ref: /schemas/types.yaml#/definitions/uint8
> + enum: [8, 32, 64]
> +
> qcom,dsb-msrs-num:
> description:
> Specifies the number of DSB(Discrete Single Bit) MSR(mux select register)
> @@ -110,4 +118,23 @@ examples:
> };
> };
>
> + tpdm@6c29000 {
> + compatible = "qcom,coresight-tpdm", "arm,primecell";
> + reg = <0x06c29000 0x1000>;
> + reg-names = "tpdm-base";
> +
> + qcom,cmb-element-size = /bits/ 8 <64>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + tpdm_ipcc_out_funnel_center: endpoint {
> + remote-endpoint =
> + <&funnel_center_in_tpdm_ipcc>;
> + };
> + };
> + };
> + };
> ...
> --
> 2.7.4
>
