Instead of manually specifying the RINGOSC_CAL_L and CAL_L values in the
alpha_pll_config.l field, use the proper clk_lucid_ole_pll_configure()
function to configure the PLL.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
drivers/clk/qcom/gpucc-sm8550.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/qcom/gpucc-sm8550.c b/drivers/clk/qcom/gpucc-sm8550.c
index 775e0b931923..420dcb27b47d 100644
--- a/drivers/clk/qcom/gpucc-sm8550.c
+++ b/drivers/clk/qcom/gpucc-sm8550.c
@@ -39,8 +39,7 @@ static const struct pll_vco lucid_ole_vco[] = {
};
static const struct alpha_pll_config gpu_cc_pll0_config = {
- /* .l includes RINGOSC_CAL_L_VAL, CAL_L_VAL, L_VAL fields */
- .l = 0x4444000d,
+ .l = 0x0d,
.alpha = 0x0,
.config_ctl_val = 0x20485699,
.config_ctl_hi_val = 0x00182261,
@@ -71,8 +70,7 @@ static struct clk_alpha_pll gpu_cc_pll0 = {
};
static const struct alpha_pll_config gpu_cc_pll1_config = {
- /* .l includes RINGOSC_CAL_L_VAL, CAL_L_VAL, L_VAL fields */
- .l = 0x44440016,
+ .l = 0x16,
.alpha = 0xeaaa,
.config_ctl_val = 0x20485699,
.config_ctl_hi_val = 0x00182261,
@@ -574,8 +572,8 @@ static int gpu_cc_sm8550_probe(struct platform_device *pdev)
if (IS_ERR(regmap))
return PTR_ERR(regmap);
- clk_lucid_evo_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
- clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
+ clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
+ clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
/*
* Keep clocks always enabled:
--
2.42.0
