Document named opp-microvolt property for opp-v2-kryo-cpu schema.
This property is used to declare multiple voltage ranges selected on the
different values read from efuses. The selection is done based on the
speed pvs values and the named opp-microvolt property is selected by the
qcom-cpufreq-nvmem driver.
Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
---
changes v6:
* Rebase on top of dependant series
* Fix example to use krait
Changes v5:
* Fix typo in opp items
Changes v4:
* Address comments from Rob (meaning of pvs, drop of
driver specific info, drop of legacy single voltage OPP,
better specify max regulators supported)
---
.../bindings/opp/opp-v2-kryo-cpu.yaml | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
index 316f9c7804e4..fd04d060c1de 100644
--- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
+++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
@@ -68,6 +68,12 @@ patternProperties:
6: MSM8996SG, speedbin 2
7-31: unused
+ Bitmap for IPQ806x SoC:
+ 0: IPQ8062
+ 1: IPQ8064/IPQ8066/IPQ8068
+ 2: IPQ8065/IPQ8069
+ 3-31: unused
+
Other platforms use bits directly corresponding to speedbin index.
clock-latency-ns: true
@@ -262,6 +268,22 @@ examples:
};
};
+ /* Dummy opp table to give example for named opp-microvolt */
+ opp-table-2 {
+ compatible = "operating-points-v2-krait-cpu";
+ nvmem-cells = <&speedbin_efuse>;
+
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt-speed0-pvs0 = <1000000 950000 1050000>;
+ opp-microvolt-speed0-pvs1 = <925000 878750 971250>;
+ opp-microvolt-speed0-pvs2 = <875000 831250 918750>;
+ opp-microvolt-speed0-pvs3 = <800000 760000 840000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <100000>;
+ };
+ };
+
smem {
compatible = "qcom,smem";
memory-region = <&smem_mem>;
--
2.40.1
