On Tue, Oct 10, 2023 at 01:25:38PM +0100, Bryan O'Donoghue wrote: > Add bindings for qcom,sc8280xp-camss in order to support the camera > subsystem for sc8280xp as found in the Lenovo x13s Laptop. > > Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> > --- > .../bindings/media/qcom,sc8280xp-camss.yaml | 582 ++++++++++++++++++ > 1 file changed, 582 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml > > diff --git a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml > new file mode 100644 > index 000000000000..5b0481d8bd07 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml > @@ -0,0 +1,582 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > + > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/qcom,sc8280xp-camss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SC8280XP Camera Subsystem (CAMSS) > + > +maintainers: > + - Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> > + > +description: | > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. > + > +properties: > + compatible: > + const: qcom,sc8280xp-camss > + > + clocks: > + maxItems: 63 > + > + clock-names: > + items: > + - const: camnoc_axi > + - const: camnoc_axi_src > + - const: cpas_ahb > + - const: cphy_rx_src > + - const: csiphy0 > + - const: csiphy0_timer_src > + - const: csiphy0_timer > + - const: csiphy1 > + - const: csiphy1_timer_src > + - const: csiphy1_timer > + - const: csiphy2 > + - const: csiphy2_timer_src > + - const: csiphy2_timer > + - const: csiphy3 > + - const: csiphy3_timer_src > + - const: csiphy3_timer > + - const: vfe0_axi > + - const: vfe0_src > + - const: vfe0 > + - const: vfe0_cphy_rx > + - const: vfe0_csid_src > + - const: vfe0_csid > + - const: vfe1_axi > + - const: vfe1_src > + - const: vfe1 > + - const: vfe1_cphy_rx > + - const: vfe1_csid_src > + - const: vfe1_csid > + - const: vfe2_axi > + - const: vfe2_src > + - const: vfe2 > + - const: vfe2_cphy_rx > + - const: vfe2_csid_src > + - const: vfe2_csid > + - const: vfe3_axi > + - const: vfe3_src > + - const: vfe3 > + - const: vfe3_cphy_rx > + - const: vfe3_csid_src > + - const: vfe3_csid > + - const: vfe_lite0_src > + - const: vfe_lite0 > + - const: vfe_lite0_cphy_rx > + - const: vfe_lite0_csid_src > + - const: vfe_lite0_csid > + - const: vfe_lite1_src > + - const: vfe_lite1 > + - const: vfe_lite1_cphy_rx > + - const: vfe_lite1_csid_src > + - const: vfe_lite1_csid > + - const: vfe_lite2_src > + - const: vfe_lite2 > + - const: vfe_lite2_cphy_rx > + - const: vfe_lite2_csid_src > + - const: vfe_lite2_csid > + - const: vfe_lite3_src > + - const: vfe_lite3 > + - const: vfe_lite3_cphy_rx > + - const: vfe_lite3_csid_src > + - const: vfe_lite3_csid > + - const: gcc_axi_hf > + - const: gcc_axi_sf > + - const: slow_ahb_src > + > + interrupts: > + maxItems: 20 > + > + interrupt-names: > + items: > + - const: csid1_lite > + - const: vfe_lite1 > + - const: csiphy3 > + - const: csid0 > + - const: vfe0 > + - const: csid1 > + - const: vfe1 > + - const: csid0_lite > + - const: vfe_lite0 > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csid2 > + - const: vfe2 > + - const: csid3_lite > + - const: csid2_lite > + - const: vfe_lite3 > + - const: vfe_lite2 > + - const: csid3 > + - const: vfe3 > + > + iommus: > + maxItems: 16 > + > + interconnects: > + maxItems: 4 > + > + interconnect-names: > + items: > + - const: cam_ahb > + - const: cam_hf_mnoc > + - const: cam_sf_mnoc > + - const: cam_sf_icp_mnoc > + > + power-domains: > + items: > + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: IFE2 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: IFE3 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. > + > + power-domain-names: > + items: > + - const: ife0 > + - const: ife1 > + - const: ife2 > + - const: ife3 > + - const: top > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + description: > + CSI input ports. > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + clock-lanes: > + maxItems: 1 > + > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + required: > + - clock-lanes > + - data-lanes > + > + port@1: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + clock-lanes: > + maxItems: 1 > + > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + required: > + - clock-lanes > + - data-lanes > + > + port@2: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + clock-lanes: > + maxItems: 1 > + > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + required: > + - clock-lanes > + - data-lanes > + > + port@3: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data. Every port has the same description. You need to define how they correlate to the h/w. 0-3 is what in the hardware? Rob
