On 07/10/2023 17:47, Krishna Kurapati wrote: > Currently the DWC3 driver supports only single port controller which > requires at most two PHYs ie HS and SS PHYs. There are SoCs that has > DWC3 controller with multiple ports that can operate in host mode. > Some of the port supports both SS+HS and other port supports only HS > mode. > > This change primarily refactors the Phy logic in core driver to allow > multiport support with Generic Phy's. > > Changes have been tested on QCOM SoC SA8295P which has 4 ports (2 > are HS+SS capable and 2 are HS only capable). > I think I said it few times on the lists to Qualcomm folks, although I cannot remember whether exactly in this patchset. Please split DTS from USB, because Greg prefers to grab everything and DTS *should go* via Qualcomm SoC. Best regards, Krzysztof
