On Tue, 3 Oct 2023 at 11:48, Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> wrote: > > On 03/10/2023 03:21, Richard Acayan wrote: > > Add documentation for the SDM670 display subsystem, adapted from the > > SDM845 and SM6125 documentation. > > > > Signed-off-by: Richard Acayan <mailingradian@xxxxxxxxx> > > --- > > .../display/msm/qcom,sdm670-mdss.yaml | 287 ++++++++++++++++++ > > 1 file changed, 287 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sdm670-mdss.yaml > > > > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm670-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm670-mdss.yaml > > new file mode 100644 > > index 000000000000..9995b018cd9e > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm670-mdss.yaml > > @@ -0,0 +1,287 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/display/msm/qcom,sdm670-mdss.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm SDM670 Display MDSS > > + > > +maintainers: > > + - Richard Acayan <mailingradian@xxxxxxxxx> > > + > > +description: > > + SDM670 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks > > + like DPU display controller, DSI and DP interfaces etc. > > + > > +$ref: /schemas/display/msm/mdss-common.yaml# > > + > > +properties: > > + compatible: > > + const: qcom,sdm670-mdss > > + > > + clocks: > > + items: > > + - description: Display AHB clock from gcc > > + - description: Display core clock > > + > > + clock-names: > > + items: > > + - const: iface > > + - const: core > > + > > + iommus: > > + maxItems: 2 > > + > > + interconnects: > > + maxItems: 2 > > + > > + interconnect-names: > > + maxItems: 2 > > + > > +patternProperties: > > + "^display-controller@[0-9a-f]+$": > > + type: object > > + additionalProperties: true > > + > > + properties: > > + compatible: > > + const: qcom,sdm670-dpu > > + > > + "^displayport-controller@[0-9a-f]+$": > > + type: object > > + additionalProperties: true > > + > > + properties: > > + compatible: > > + const: qcom,sdm670-dp > > + > > + "^dsi@[0-9a-f]+$": > > + type: object > > + additionalProperties: true > > + > > + properties: > > + compatible: > > + contains: > > + const: qcom,sdm670-dsi-ctrl > > + > > + "^phy@[0-9a-f]+$": > > + type: object > > + additionalProperties: true > > + > > + properties: > > + compatible: > > + const: qcom,dsi-phy-10nm > > This does not look right. Why the compatible is generic, not SoC-specific? Because for 10nm DSI PHY we don't have SoC-specific compatibles other than the ugly 8998 compat string. > > > + > > +required: > > + - compatible > > + > > +unevaluatedProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/qcom,dispcc-sdm845.h> > > + #include <dt-bindings/clock/qcom,gcc-sdm845.h> > > + #include <dt-bindings/clock/qcom,rpmh.h> > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + #include <dt-bindings/power/qcom-rpmpd.h> > > + > > + display-subsystem@ae00000 { > > + compatible = "qcom,sdm670-mdss"; > > + reg = <0x0ae00000 0x1000>; > > + reg-names = "mdss"; > > + power-domains = <&dispcc MDSS_GDSC>; > > + > > + clocks = <&gcc GCC_DISP_AHB_CLK>, > > + <&dispcc DISP_CC_MDSS_MDP_CLK>; > > + clock-names = "iface", "core"; > > + > > + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-controller; > > + #interrupt-cells = <1>; > > + > > Please add interconnects. They do not have to be 100% exact with DTS > (unless interconnect header is not merged?). This is just an example. > > > + iommus = <&apps_smmu 0x880 0x8>, > > + <&apps_smmu 0xc80 0x8>; > > > + > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges; > > + > > Best regards, > Krzysztof > -- With best wishes Dmitry
