On 28/08/2023 14:04, Konrad Dybcio wrote:
On 27.08.2023 05:28, Dmitry Baryshkov wrote:
APQ8064 can scale core voltage according to the frequency needs. Rather
than reusing the A/B format multiplexer, use a simple fuse parsing
function and configure required regulator.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
drivers/cpufreq/qcom-cpufreq-nvmem.c | 49 ++++++++++++++++++++++++++--
1 file changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
index 81c080b854fe..35e2610c9526 100644
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
@@ -26,6 +26,7 @@
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
#include <linux/pm_opp.h>
+#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/soc/qcom/smem.h>
@@ -39,6 +40,7 @@ struct qcom_cpufreq_match_data {
char **pvs_name,
struct qcom_cpufreq_drv *drv);
const char **genpd_names;
+ const char * const *regulator_names;
};
struct qcom_cpufreq_drv {
@@ -203,6 +205,34 @@ static int qcom_cpufreq_krait_name_version(struct device *cpu_dev,
return ret;
}
+static int qcom_cpufreq_apq8064_name_version(struct device *cpu_dev,
+ struct nvmem_cell *speedbin_nvmem,
+ char **pvs_name,
+ struct qcom_cpufreq_drv *drv)
+{
+ int speed = 0, pvs = 0;
+ u8 *speedbin;
+ size_t len;
+ int ret = 0;
Unused, just return 0
+
+ speedbin = nvmem_cell_read(speedbin_nvmem, &len);
+ if (IS_ERR(speedbin))
+ return PTR_ERR(speedbin);
+
+ if (len != 4)
+ return -EINVAL;
+
+ get_krait_bin_format_a(cpu_dev, &speed, &pvs, speedbin);
+
+ snprintf(*pvs_name, sizeof("speedXX-pvsXX"), "speed%d-pvs%d",
+ speed, pvs);
speed and pvs are both one hex digit long at best (see masking in
get_krait_bin_format_a)
One hex translates to two decimal digits (0xf = 15).
Konrad
--
With best wishes
Dmitry
