[PATCH 0/8] Enable USB3 for Qualcomm IPQ5332

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Patch series adds Qualcomm 22ull Super-Speed USB UNIPHY driver
support present in Qualcomm IPQ5332 SoC which is required to
enable the USB3. This PHY is interfaced with SNPS DWC3 USB and
SNPS DWC PCIe. Either one of the interface can use it via the
mux selection present in the TCSR register. Current patch series
adds the support for UNIPHY with DWC3 USB.

Discards the first patch series as adding a new driver.

Praveenkumar I (8):
  dt-bindings: phy: qcom,uniphy-usb: Document qcom,uniphy-usb phy
  phy: qcom: Introduce Super-Speed USB UNIPHY driver
  arm64: dts: qcom: ipq5332: Add USB Super-Speed PHY node
  dt-bindings: usb: dwc3: Add clocks on Qualcomm IPQ5332
  arm64: dts: qcom: ipq5332: Add clocks for USB Super-Speed
  arm64: dts: qcom: ipq5332: Add Super-Speed UNIPHY in USB node
  arm64: dts: qcom: ipq5332: Enable USB Super-Speed PHY
  arm64: defconfig: Enable qcom USB UNIPHY driver

 .../bindings/phy/qcom,ipq5332-usb-uniphy.yaml |  83 +++++
 .../devicetree/bindings/usb/qcom,dwc3.yaml    |  20 +-
 arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts   |   6 +
 arch/arm64/boot/dts/qcom/ipq5332.dtsi         |  40 ++-
 arch/arm64/configs/defconfig                  |   1 +
 drivers/phy/qualcomm/Kconfig                  |  11 +
 drivers/phy/qualcomm/Makefile                 |   1 +
 drivers/phy/qualcomm/phy-qcom-uniphy-usb.c    | 322 ++++++++++++++++++
 8 files changed, 476 insertions(+), 8 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-uniphy.yaml
 create mode 100644 drivers/phy/qualcomm/phy-qcom-uniphy-usb.c


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