On Wed, Sep 20, 2023 at 07:25:08PM +0530, Mrinmay Sarkar wrote: > Add devicetree bindings support for SA8775P SoC. > Define reg and interrupt per platform. > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx> > --- > .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 130 +++++++++++++++++---- > 1 file changed, 108 insertions(+), 22 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > index a223ce0..e860e8f 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > @@ -13,6 +13,7 @@ properties: > compatible: > oneOf: > - enum: > + - qcom,sa8775p-pcie-ep > - qcom,sdx55-pcie-ep > - qcom,sm8450-pcie-ep > - items: > @@ -20,29 +21,19 @@ properties: > - const: qcom,sdx55-pcie-ep > > reg: > - items: > - - description: Qualcomm-specific PARF configuration registers > - - description: DesignWare PCIe registers > - - description: External local bus interface registers > - - description: Address Translation Unit (ATU) registers > - - description: Memory region used to map remote RC address space > - - description: BAR memory region > + minItems: 6 > + maxItems: 7 > > reg-names: > - items: > - - const: parf > - - const: dbi > - - const: elbi > - - const: atu > - - const: addr_space > - - const: mmio > + minItems: 6 > + maxItems: 7 > > clocks: > - minItems: 7 > + minItems: 5 > maxItems: 8 > > clock-names: > - minItems: 7 > + minItems: 5 > maxItems: 8 > > qcom,perst-regs: > @@ -57,14 +48,12 @@ properties: > - description: Perst separation enable offset > > interrupts: > - items: > - - description: PCIe Global interrupt > - - description: PCIe Doorbell interrupt > + minItems: 2 > + maxItems: 3 > > interrupt-names: > - items: > - - const: global > - - const: doorbell > + minItems: 2 > + maxItems: 3 > > reset-gpios: > description: GPIO used as PERST# input signal > @@ -122,6 +111,51 @@ allOf: > compatible: > contains: > enum: > + - qcom,sa8775p-pcie-ep > + then: > + properties: > + reg: > + items: > + - description: Qualcomm-specific PARF configuration registers > + - description: DesignWare PCIe registers > + - description: External local bus interface registers > + - description: Address Translation Unit (ATU) registers > + - description: Memory region used to map remote RC address space > + - description: BAR memory region > + - description: DMA memory region It should be described as "DMA register space" or something, because this could be misinterpreted as memory region for doing DMA. - Mani -- மணிவண்ணன் சதாசிவம்
