On Fri, 01 Sep 2023 13:06:40 +0530, Devi Priya wrote:
> If the parent clock rate is greater than unsigned long max/2 then
> integer overflow happens when calculating the clock rate on 32-bit systems.
> As RCG2 uses half integer dividers, the clock rate is first being
> multiplied by 2 which will overflow the unsigned long max value.
> Hence, replace the common pattern of doing 64-bit multiplication
> and then a do_div() call with simpler mult_frac call.
>
> [...]
Applied, thanks!
[1/1] clk: qcom: clk-rcg2: Fix clock rate overflow for high parent frequencies
commit: f7b7d30158cff246667273bd2a62fc93ee0725d2
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
