On Fri, Sep 15, 2023 at 10:15:08AM +0800, Tengfei Fan wrote:
> Add base description of UART, TLMM, interconnect, TCSRCC and SMMU nodes
> which helps SM4450 boot to shell with console on boards with this SoC.
>
> Signed-off-by: Tengfei Fan <quic_tengfan@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 +-
> arch/arm64/boot/dts/qcom/sm4450.dtsi | 313 +++++++++++++++++++++---
> 2 files changed, 301 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
> index 00a1c81ca397..0f253a2ba170 100644
> --- a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
> @@ -10,9 +10,23 @@
> model = "Qualcomm Technologies, Inc. SM4450 QRD";
> compatible = "qcom,sm4450-qrd", "qcom,sm4450";
>
> - aliases { };
> + aliases {
> + serial0 = &uart7;
> + };
>
> chosen {
> - bootargs = "console=hvc0";
> + stdout-path = "serial0:115200n8";
> };
> };
> +
> +&qupv3_id_0 {
> + status = "okay";
> +};
> +
> +&tlmm {
> + gpio-reserved-ranges = <0 4>, <136 1>;
> +};
> +
> +&uart7 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
[..]
> + qupv3_id_0: geniqup@ac0000 {
> + compatible = "qcom,geni-se-qup";
> + reg = <0x0 0x00ac0000 0x0 0x2000>;
> + ranges;
> + clock-names = "m-ahb", "s-ahb";
> + clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
> + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
> + iommus = <&apps_smmu 0x163 0x0>;
> + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>;
> + interconnect-names = "qup-core";
The patch ends up adding a smorgasbord of different things, some of
which do relate to giving you a console and others mostly not related at
all, because of the iommus and interconnects here.
If you omit these three properties from this, you can add the
console, then add iommu and interconnect nodes in three clear patches.
PS. Commit message says this is all needed for boot-to-shell, but I
don't think you need scm, nor tcsr nodes to achieve that.
Regards,
Bjorn
