Quoting Danila Tikhonov (2023-09-13 10:56:11)
> Set .flags = CLK_OPS_PARENT_ENABLE to fix "gcc_sdcc2_apps_clk_src: rcg
> didn't update its configuration" error.
>
> Fixes: 2a1d7eb854bb ("clk: qcom: gcc: Add global clock controller driver for SM8150")
> Tested-by: Arseniy Velikanov <adomerlee@xxxxxxxxx>
> Signed-off-by: Danila Tikhonov <danila@xxxxxxxxxxx>
> ---
> drivers/clk/qcom/gcc-sm8150.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
> index 41ab210875fb..05d115c52dfe 100644
> --- a/drivers/clk/qcom/gcc-sm8150.c
> +++ b/drivers/clk/qcom/gcc-sm8150.c
> @@ -774,7 +774,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
> .name = "gcc_sdcc2_apps_clk_src",
> .parent_data = gcc_parents_6,
> .num_parents = ARRAY_SIZE(gcc_parents_6),
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_OPS_PARENT_ENABLE,
> .ops = &clk_rcg2_floor_ops,
In what case are we getting the rcg stuck? I thought that you could
write the rcg registers while the parent was off and switch to that
parent if the parent isn't enabled and it wouldn't get stuck.
