On 7.09.2023 08:00, Krishna chaitanya chundru wrote:
> PCIe needs to choose the appropriate performance state of RPMH power
> domain based up on the PCIe gen speed.
>
> So let's add the OPP table support to specify RPMH performance states.
>
> Use opp-level for the PCIe gen speed for easier use.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@xxxxxxxxxxx>
> ---
[...]
> +
> + pcie1_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-1 {
> + opp-level = <1>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-2 {
> + opp-level = <2>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-3 {
> + opp-level = <3>;
> + required-opps = <&rpmhpd_opp_low_svs>;
Is gen3 not supposed to require nom like on pcie0?
Also, can all non-maximum OPPs run at just low_svs?
Konrad
