[PATCH 2/5] dt-bindings: phy: Add qcom,sdx75-qmp-usb3-uni schema file

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Add a dt-binding schema for SDX75 SoC.

Signed-off-by: Rohit Agarwal <quic_rohiagar@xxxxxxxxxxx>
---
 .../bindings/phy/qcom,sdx75-qmp-usb3-uni-phy.yaml  | 106 +++++++++++++++++++++
 1 file changed, 106 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,sdx75-qmp-usb3-uni-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/qcom,sdx75-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sdx75-qmp-usb3-uni-phy.yaml
new file mode 100644
index 0000000..2ae0710
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,sdx75-qmp-usb3-uni-phy.yaml
@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/qcom,sdx75-qmp-usb3-uni-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm QMP PHY controller (USB, SDX75)
+
+maintainers:
+  - Vinod Koul <vkoul@xxxxxxxxxx>
+
+description:
+  The QMP PHY controller supports physical layer functionality for a number of
+  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
+
+properties:
+  compatible:
+    enum:
+      - qcom,sdx75-qmp-usb3-uni-phy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 4
+
+  clock-names:
+    items:
+      - const: aux
+      - const: cfg_ahb
+      - const: ref
+      - const: pipe
+
+  power-domains:
+    maxItems: 1
+
+  resets:
+    maxItems: 2
+
+  reset-names:
+    items:
+      - const: phy
+      - const: common
+
+  vdda-phy-supply: true
+
+  vdda-pll-supply: true
+
+  "#clock-cells":
+    const: 0
+
+  clock-output-names:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - power-domains
+  - resets
+  - reset-names
+  - vdda-phy-supply
+  - vdda-pll-supply
+  - "#clock-cells"
+  - clock-output-names
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-sdx75.h>
+    #include <dt-bindings/clock/qcom,rpmh.h>
+
+    phy@ff6000 {
+      compatible = "qcom,sdx75-qmp-usb3-uni-phy";
+      reg = <0x0ff6000 0x2000>;
+
+      clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
+               <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+               <&gcc GCC_USB2_CLKREF_EN>,
+               <&gcc GCC_USB3_PHY_PIPE_CLK>;
+      clock-names = "aux",
+                    "cfg_ahb",
+                    "ref",
+                    "pipe";
+
+      power-domains = <&gcc GCC_USB3_PHY_GDSC>;
+
+      resets = <&gcc GCC_USB3PHY_PHY_BCR>,
+               <&gcc GCC_USB3_PHY_BCR>;
+      reset-names = "phy",
+                    "common";
+
+      vdda-phy-supply = <&vreg_l4b_0p88>;
+      vdda-pll-supply = <&vreg_l1b_1p2>;
+
+      #clock-cells = <0>;
+      clock-output-names = "usb3_uni_phy_pipe_clk_src";
+
+      #phy-cells = <0>;
+    };
-- 
2.7.4




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