Starting from HW version 3.2 the IRQ_ENABLE bit has moved to the IRQ_i_CFG register and requires a change of the driver to avoid writing into an undefined register address. Get the HW version from registers and set the IRQ_ENABLE bit to the correct register depending on the HW version. Since SM8150 DT uses a too smal PDC reg size, it's required to: - fix SM8150 DT - extend the PDC reg from the driver if used with old unfixed DT Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> --- Changes in v4: - Continue Dmitry's serie at https://lore.kernel.org/all/20230829092119.1017194-1-dmitry.baryshkov@xxxxxxxxxx/ - Dmitry's changes: - Fix PDC resource size if it is too short instead of setting version to dummy 0 value (Marc). - Squashed the fix into the original patch. - Changes requested by Marc on Dmitry's serie: - explicit PDC_VERSION is a reg offset - remove the enum - move the enable_intr to a shared function - add a warning when reg size doesn't match max size - Link to v3: https://lore.kernel.org/r/20230823-topic-sm8x50-upstream-pdc-ver-v3-1-aa7d9ab862e4@xxxxxxxxxx Changes in v3: - Simplify qcom_pdc_gic_set_type() - Used __assign_bit in pdc_setup_pin_mapping() - remove BIT() from IRQ_i_CFG_IRQ_ENABLE to be used with __assign_bit() - Add Reviewed-by tag - Link to v2: https://lore.kernel.org/r/20230822-topic-sm8x50-upstream-pdc-ver-v2-1-3035b8d388f7@xxxxxxxxxx Changes in v2: - Changed IRQ_ENABLE handling based on Maulik's comments - Link to v1: https://lore.kernel.org/r/20230821-topic-sm8x50-upstream-pdc-ver-v1-1-6d7f4dd95719@xxxxxxxxxx --- Dmitry Baryshkov (1): arm64: dts: qcom: sm8150: extend the size of the PDC resource Neil Armstrong (1): irqchip/qcom-pdc: Add support for v3.2 HW arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- drivers/irqchip/qcom-pdc.c | 69 ++++++++++++++++++++++++++---------- 2 files changed, 52 insertions(+), 19 deletions(-) --- base-commit: 47d9bb711707d15b19fad18c8e2b4b027a264a3a change-id: 20230821-topic-sm8x50-upstream-pdc-ver-114ceb45e1ee Best regards, -- Neil Armstrong <neil.armstrong@xxxxxxxxxx>
