On 23-08-29 22:59:04, Konrad Dybcio wrote:
> There are two instances of the POWER_STATE_CONFIG1 register: one in
> the PCS space and another one in PCS_USB.
>
> The downstream init sequence pokes the latter one while we've been poking
> the former one (and misnamed it as the latter one, impostor!). Fix that
> up to avoid UB.
>
> Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Reviewed-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +-
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 3 ++-
> 2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index cbb28afce135..843099d314bf 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -859,10 +859,10 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
> - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> };
>
> static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> + QMP_PHY_INIT_CFG(QPHY_USB_Q6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> index 9510e63ba9d8..b9060c242fd2 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> @@ -12,7 +12,7 @@
> #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
> #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
> #define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
> -#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90
> +#define QPHY_USB_V6_PCS_POWER_STATE_CONFIG1 0x90
> #define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
> #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
> #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
> @@ -23,6 +23,7 @@
> #define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
> #define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
>
> +#define QPHY_USB_Q6_PCS_USB3_POWER_STATE_CONFIG1 0x00
> #define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
> #define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
> #define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
>
> --
> 2.42.0
>
