Re: [Freedreno] [PATCH 3/3] drm/msm/dpu: drop dpu_encoder_phys_ops.atomic_mode_set

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On 8/17/2023 12:27 PM, Abhinav Kumar wrote:


On 8/17/2023 11:50 AM, Dmitry Baryshkov wrote:
On 08/08/2023 02:49, Abhinav Kumar wrote:


On 6/4/2023 7:45 AM, Dmitry Baryshkov wrote:
The atomic_mode_set() callback only sets the phys_enc's IRQ data. As the
INTF and WB are statically allocated to each encoder/phys_enc, drop the
atomic_mode_set callback and set the IRQs during encoder init.

For the CMD panel usecase some of IRQ indexes depend on the selected
resources. Move setting them to the irq_enable() callback.


The irq_enable() callback is called from the dpu_encoder_virt_atomic_enable() after the phys layer's enable.

Thats late.

So lets consider the case where command mode panel's clock is powered from bootloader (quite common).

Now, as soon as the tearcheck is configured and interface is ON from the phys's enable(), nothing prevents / should prevent the interrupt from firing.

Please note that interrupt callbacks are also registered from the irq_control(). There is no way the interrupt can fire beforehand (and the call chain is dpu_encoder_virt_atomic_enable() -> dpu_encoder_resource_control() -> _dpu_encoder_resource_control_helper() -> _dpu_encoder_irq_control() -> irq_control().

If we ever want to move irq_control() to be called before phys's enable() callbacks, this will be a separate patchset, involving refactoring of dpu_encoder_resource_control().


Ack, I will rebase my patches on top of this and re-test it.

Then will give my R-b, tested-by tags by Monday.


Sorry for the delay on this.

Reviewed-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
Tested-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx> # sc7280

Made sure that sc7280 boots up fine and kms_writeback works



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